Logic Gates & Truth Tables Explained (OCR A-Level CS 1.4.3)
OCR A-Level CS 1.4.3: the six logic gates and their truth tables, reading Boolean expressions from circuits, and building a truth table from a logic diagram.
Free Logic Gates Truth Tables revision resources (OCR A-Level Computer Science, 1.4.3)
We’ve made exam-style practice for this exact topic, free to download: Logic Gates Truth Tables question sheet, mark scheme and cheat sheet. Grab them, have a go, then read the full guide below.
Boolean logic is where computer science meets the actual circuitry — every decision a processor makes is built from logic gates. Spec points 1.4.3(d) and (a) cover the logic gates, their truth tables, and turning a problem or circuit into a Boolean expression. Expect to "complete the truth table", "draw the logic circuit" and "give the Boolean expression" almost every year.
Let's nail the six gates, the notation, and how to build a truth table from a circuit.
The six logic gates
A logic gate takes one or more binary inputs (0 or 1) and produces a single binary output. The six you must know, with their Boolean notation:
NOT (¬A) — one input; inverts it. Output is 1 when the input is 0.
AND (A·B) — output is 1 only when both inputs are 1.
OR (A+B) — output is 1 when at least one input is 1.
NAND (¬(A·B)) — AND followed by NOT; output is 0 only when both inputs are 1.
NOR (¬(A+B)) — OR followed by NOT; output is 1 only when both inputs are 0.
XOR (A⊕B) — "exclusive OR"; output is 1 when the inputs are different (one or the other, but not both).
Notation note. OCR accepts a few styles. This post uses · for AND, + for OR, ¬ (or a bar, Ā) for NOT, and ⊕ for XOR. You may also see ∧, ∨ and an overbar — they mean the same thing.
Truth tables for the basic gates
A truth table lists every possible combination of inputs and the resulting output. For two inputs there are 2² = 4 rows:
A | B | A·B (AND) | A+B (OR) | A⊕B (XOR) | ¬(A·B) (NAND) | ¬(A+B) (NOR) |
|---|---|---|---|---|---|---|
0 | 0 | 0 | 0 | 0 | 1 | 1 |
0 | 1 | 0 | 1 | 1 | 1 | 0 |
1 | 0 | 0 | 1 | 1 | 1 | 0 |
1 | 1 | 1 | 1 | 0 | 0 | 0 |
Notice NAND and NOR are just the AND and OR columns inverted, and XOR is 1 exactly when A and B differ.
From a problem to a Boolean expression
OCR often gives a real scenario and asks for the Boolean expression — defining a problem using Boolean logic. For example: "A discount applies if the customer is a member (M) AND it is a Tuesday (T), OR if they are a student (S)." Translating directly:
Each "AND" becomes ·, each "OR" becomes +, and a "NOT" becomes a bar/¬. Read the sentence and build the expression piece by piece.
Building a truth table from a circuit
The reliable method for "complete the truth table" questions is to add a column for each gate's output, working through the circuit gate by gate.
Worked example: Q = (A · B) + ¬C. With three inputs there are 2³ = 8 rows. Add intermediate columns for A·B and ¬C, then OR them:
A | B | C | A·B | ¬C | Q = (A·B)+¬C |
|---|---|---|---|---|---|
0 | 0 | 0 | 0 | 1 | 1 |
0 | 0 | 1 | 0 | 0 | 0 |
0 | 1 | 0 | 0 | 1 | 1 |
0 | 1 | 1 | 0 | 0 | 0 |
1 | 0 | 0 | 0 | 1 | 1 |
1 | 0 | 1 | 0 | 0 | 0 |
1 | 1 | 0 | 1 | 1 | 1 |
1 | 1 | 1 | 1 | 0 | 1 |
The intermediate columns keep you from making slips — fill them first, then combine. (To go the other way and draw a circuit from an expression, place a gate for each operator and wire the inputs through in the right order.)
Common exam mistakes
Confusing OR and XOR. OR is 1 when at least one input is 1 (including both); XOR is 1 only when they differ (not both).
Getting NAND/NOR backwards. They're AND/OR with the output inverted — NAND is 0 only when both are 1; NOR is 1 only when both are 0.
Skipping intermediate columns. For multi-gate circuits, add a column per gate — combining everything in your head causes errors.
Wrong number of rows. n inputs → 2ⁿ rows (2 inputs = 4, 3 inputs = 8). List them in binary-counting order so none are missed.
Misreading the expression order. Brackets first, then the gate joining them — just like normal arithmetic precedence.
Quick recap
Six gates: NOT (¬A), AND (A·B), OR (A+B), NAND (¬(A·B)), NOR (¬(A+B)), XOR (A⊕B, "different").
A truth table lists all input combinations and the output; n inputs → 2ⁿ rows.
NAND/NOR = AND/OR inverted; XOR = 1 when inputs differ.
Turn a problem into an expression by translating AND→·, OR→+, NOT→bar.
To complete a truth table for a circuit, add an intermediate column per gate, then combine.
Frequently asked questions
What is a logic gate? A logic gate is an electronic component that takes one or more binary inputs (0 or 1) and produces a single binary output according to a logical rule. The main gates are NOT, AND, OR, NAND, NOR and XOR, and circuits are built by connecting them together.
What is the difference between OR and XOR? An OR gate outputs 1 when at least one input is 1, including when both are 1. An XOR (exclusive OR) gate outputs 1 only when the inputs are different — one or the other but not both — so it outputs 0 when both inputs are the same.
What do NAND and NOR gates do? A NAND gate is an AND gate with its output inverted, so it outputs 0 only when both inputs are 1 and 1 otherwise. A NOR gate is an OR gate with its output inverted, so it outputs 1 only when both inputs are 0 and 0 otherwise.
What is a truth table? A truth table lists every possible combination of a circuit's inputs alongside the resulting output. For n inputs there are 2 to the power n rows, so two inputs give four rows and three inputs give eight rows.
How do you complete a truth table for a logic circuit? Add an intermediate column for the output of each gate in the circuit and fill them in working from the inputs through to the final gate. Filling the intermediate columns first, then combining them, avoids errors compared with calculating the whole expression at once.
How do you write a Boolean expression from a problem? Translate the conditions directly: each AND becomes the AND operator, each OR becomes the OR operator and each NOT becomes a bar or NOT, using brackets to group conditions. For example, "member and Tuesday, or student" becomes Q = (M · T) + S.
