Adders & D-Type Flip-Flops: Logic that Computes & Remembers (OCR A-Level CS 1.4.3)
OCR A-Level CS 1.4.3: the half adder and full adder built from logic gates, and the D-type flip-flop — how it stores one bit, synchronised to a clock.
Free Adders Flip Flops revision resources (OCR A-Level Computer Science, 1.4.3)
We’ve made exam-style practice for this exact topic, free to download: Adders Flip Flops question sheet, mark scheme and cheat sheet. Grab them, have a go, then read the full guide below.
Logic gates don't just make decisions — wired the right way they can add binary numbers and store a bit of memory. Spec point 1.4.3(e) covers the half adder, the full adder, and the D-type flip-flop. Exam questions ask you to write the Boolean expressions, draw a half adder, or state what a flip-flop is for.
Let's build the adders from gates, then see how a flip-flop remembers.
The half adder
A half adder adds two single binary digits, A and B, and produces two outputs: the sum (S) and the carry (C). Think of adding 1 + 1 in binary: the answer is 10 — a sum of 0 and a carry of 1.
Working out the logic from the four cases:
Sum is 1 when the inputs differ (0+1 or 1+0) — that's exactly XOR:
S = A ⊕ B.Carry is 1 only when both are 1 — that's AND:
C = A · B.
A | B | S (A⊕B) | C (A·B) |
|---|---|---|---|
0 | 0 | 0 | 0 |
0 | 1 | 1 | 0 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 1 |
So a half adder is just one XOR gate and one AND gate. It's called "half" because it can't accept a carry in from a previous column — which is the job of the full adder.
The full adder
A full adder adds three inputs: A, B and a carry-in (Cin) from the previous column. It outputs a sum (S) and a carry-out (Cout):
S = A ⊕ B ⊕ Cin— the sum is 1 when an odd number of inputs are 1.Cout = (A · B) + (Cin · (A ⊕ B))— there's a carry out if both A and B are 1, or if the carry-in meets exactly one of them.
You can build a full adder from two half adders and an OR gate: the first half adder adds A and B; the second adds that sum to Cin; the two carries are combined with OR. Here's the full truth table — note it matches ordinary arithmetic (A + B + Cin):
A | B | Cin | S | Cout |
|---|---|---|---|---|
0 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 0 |
0 | 1 | 0 | 1 | 0 |
0 | 1 | 1 | 0 | 1 |
1 | 0 | 0 | 1 | 0 |
1 | 0 | 1 | 0 | 1 |
1 | 1 | 0 | 0 | 1 |
1 | 1 | 1 | 1 | 1 |
To add multi-bit numbers, full adders are chained (concatenated) — the carry-out of one column feeds the carry-in of the next, exactly like carrying in column addition.
The D-type flip-flop
The adders compute, but they don't remember. A D-type flip-flop is a circuit that stores one bit. It has two inputs — a data input (D) and a clock — and two outputs, Q and its inverse ¬Q.
How it works: on the edge of the clock pulse (a tick), the flip-flop captures whatever is on D and holds it on Q until the next clock edge. Between ticks, the output stays the same even if D changes — so it has effectively remembered the bit.
The two facts OCR wants:
Purpose: it stores a single bit of data, synchronised to a clock.
Use: flip-flops are the building blocks of registers and memory, and the clock keeps many of them changing in step across the processor.
Worked example: the half adder's outputs
For a half adder, "write the expression for S" → S = A ⊕ B; "write the expression for C" → C = A · B. To draw it: send A and B into an XOR gate (output S) and the same A and B into an AND gate (output C). That single two-gate circuit is the complete half adder — a favourite 3-mark "draw a half adder" question.
Common exam mistakes
Sum is XOR, not OR. The half-adder sum is
A ⊕ B(1 when inputs differ); OR would be wrong for1 + 1.Forgetting the carry-in. A half adder has no carry-in; a full adder adds three inputs (A, B, Cin).
Saying a flip-flop has one output. It has Q and ¬Q, plus the clock input alongside D.
Missing the clock's role. The flip-flop captures D on the clock edge and holds it — that synchronisation is the point.
Confusing compute and store. Adders calculate; flip-flops remember — different jobs.
Quick recap
Half adder: adds A and B → S = A ⊕ B (XOR) and C = A · B (AND). One XOR + one AND gate.
Full adder: adds A, B and Cin → S = A ⊕ B ⊕ Cin, Cout = A·B + Cin·(A⊕B). Built from two half adders + OR; chained for multi-bit addition.
D-type flip-flop: stores one bit; inputs D and clock, outputs Q and ¬Q.
On the clock edge it captures D onto Q and holds it until the next tick.
Flip-flops are the basis of registers and memory, kept in step by the clock.
Frequently asked questions
What is a half adder? A half adder is a logic circuit that adds two single binary digits, A and B, producing a sum and a carry. The sum is given by an XOR gate (S = A XOR B) and the carry by an AND gate (C = A AND B). It cannot accept a carry-in from a previous column.
What is the difference between a half adder and a full adder? A half adder adds only two inputs, A and B, while a full adder adds three inputs: A, B and a carry-in from the previous column. The full adder produces a sum and a carry-out and can be built from two half adders combined with an OR gate.
What are the Boolean expressions for a full adder? For a full adder the sum is S = A XOR B XOR Cin, which is 1 when an odd number of the three inputs are 1, and the carry-out is Cout = (A AND B) OR (Cin AND (A XOR B)). These match the result of adding A, B and the carry-in arithmetically.
What is a D-type flip-flop? A D-type flip-flop is a logic circuit that stores a single bit of data. It has a data input D and a clock input, and outputs Q and its inverse NOT Q. On each clock edge it captures the value on D and holds it on Q until the next clock edge.
What is a D-type flip-flop used for? A D-type flip-flop is used to store one bit of data synchronised to a clock. Flip-flops are the building blocks of registers and memory, and the shared clock keeps many of them changing in step with each other across the processor.
Why is a full adder needed to add binary numbers? Adding multi-bit binary numbers requires carrying from one column to the next, just like column addition. A full adder accepts that carry-in as a third input, so full adders can be chained together — the carry-out of one column feeding the carry-in of the next — to add numbers of any length.
